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| INDEX MX23L6422 64M-BIT Mask ROM (8/16 Bit Output) FEATURES * Bit organization - 4M x 16 (byte mode) - 2M x 32 (double word mode) * Fast access time - Random access: 115ns (max.) - Page access: 35ns (max.) * Page Size - 8 double words per page * Current - Operating: 40mA (max.) - Standby: 20uA (max.) * Supply voltage - 3.3V10% * Package - 70 pin SSOP (500 mil) - 100 pin TQFP (14mm x 14mm) ORDER INFORMATION Part No. MX23L6422MC-11 MX23L6422MC-12 MX23L6422VC-12 Access Time 115ns 120ns 120ns Page Access Package Time 35ns 50ns 50ns 70 pin SSOP 70 pin SSOP 100 pin TQFP PIN DESCRIPTION Symbol A0~A20 D0~D30 D31/A-1 CE OE Word VCC VSS NC Pin Function Address Inputs Data Outputs D31 (Double Word Mode)/ LSB Address (Word Mode) Chip Enable Input Output Enable Input Double Word/ Word Mode Selection Power Supply Pin Ground Pin No Connection PIN CONFIGURATION 70 SSOP A0 A1 A2 A3 A4 A5 VCC D0 D16 D1 D17 VSS VCC D2 D18 D3 D19 D4 D20 D5 D21 VSS VCC D6 D22 D7 D23 VSS A6 A7 A8 A9 A10 A11 A12 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 NC NC A20 WORD OE CE VSS D31/A-1 D15 D30 D14 VSS VCC D29 D13 D28 D12 D27 D11 D26 D10 VSS VCC D25 D9 D24 D8 VCC A19 A18 A17 A16 A15 A14 A13 MODE SELECTION CE OE Word D31/A-1D0~D15 D16~D31 Mode H L L L X H L L X X H L X X High Z High Z High Z High Z Word Input D0~D15 High Z Word Active Power Stand-by Active Active Output D0~D15 D16~D31 Double P/N:PM0410 MX23L6422 REV. 2.1, JAN. 29, 1999 1 INDEX MX23L6422 100 TQFP NC NC D31 D15 D30 D14 VSS VCC D29 D13 D28 D12 NC NC D27 D11 D26 D10 VSS VCC D25 D9 D24 D8 NC 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 NC NC NC NC NC VSS CE OE WORD A20 NC NC NC NC A0 A1 A2 A3 A4 A5 VCC NC NC NC NC 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 MX23L6422 NC NC NC VCC NC A19 A18 A17 A16 A15 A14 NC NC A13 A12 A11 A10 A9 A8 A7 A6 NC NC NC NC BLOCK DIAGRAM A0/(A-1) A2 A3 A20 CE WORD OE Address Buffer Memory Array Page Buffer Page Decoder Double Word/ Word Output Buffer D0 D31/(D15) P/N:PM0410 NC D0 D16 D1 D17 VSS VCC D2 D18 D3 NC D19 NC D4 D20 D5 D21 VSS VCC D6 D22 D7 D23 VSS NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 REV. 2.1, JAN. 29, 1999 2 INDEX MX23L6422 ABSOLUTE MAXIMUM RATINGS Item Voltage on any Pin Relative to VSS Ambient Operating Temperature Storage Temperature Symbol VIN Topr Tstg Ratings -1.3V to 2.0V 0 to 70 C C -65 to 125 C C Note: Minimum DC voltage on input or I/O pins is -0.5V. During voltage transitions, inputs may undershoot VSS to -1.3V for periods of up to 20ns. Maximum DC voltage on input or I/O pins is VCC+0.5V. During voltage transitions, input may overshoot VCC to VCC+2.0V for periods of up to 20ns. DC CHARACTERISTICS (Ta = 0C ~ 70C, VCC = 3.3V10%) Item Output High Voltage Output Low Voltage Input High Voltage Input Low Voltage Input Leakage Current Output Leakage Current Operating Current Symbol VOH VOL VIH VIL ILI ILO ICC1 MIN. 2.4V 2.2V -0.3V MAX. 0.4V VCC+0.3V 0.8V 10uA 10uA 40mA Conditions IOH = -0.4mA IOL = 1.6mA Standby Current (TTL) Standby Current (CMOS) Input Capacitance Output Capacitance ISTB1 ISTB2 CIN COUT - 1mA 20uA 10pF 10pF 0V, VCC 0V, VCC tRC = 120ns, all output open, with normal sequential access testing pattern CE = VIH CE>VCC-0.2V Ta = 25 f = 1MHZ C, Ta = 25 f = 1MHZ C, P/N:PM0410 REV. 2.1, JAN. 29, 1999 3 INDEX MX23L6422 AC CHARACTERISTICS (Ta = 0C ~ 70C, VCC = 3.3V10%) Item Read Cycle Time Address Access Time Chip Enable Access Time Page Mode Access Time Output Enable Time Output Hold After Address Output High Z Delay Symbol tRC tAA tACE tPA tOE tOH tHZ 23L6422-11 MIN. 150ns 0ns MAX. 115ns 115ns 35ns 35ns 20ns 23L6422-12 MIN. 120ns 0ns MAX. 120ns 120ns 50ns 50ns 20ns Note:Output high-impedance delay (tHZ) is measured from OE or CE going high, and this parameter guaranteed by design over the full voltage and temperature operating range - not tested. AC Test Conditions Input Pulse Levels Input Rise and Fall Times Input Timing Level Output Timing Level Output Load 0.4V~ 2.4V 10ns 1.4V 1.4V See Figure IOH (load)=-0.4mA DOUT IOL (load)=1.6mA C<100pF Note:No output loading is present in tester load board. Active loading is used and under software programming control. Output loading capacitance includes load board's and all stray capacitance. P/N:PM0410 REV. 2.1, JAN. 29, 1999 4 INDEX MX23L6422 TIMING DIAGRAM RANDOM READ ADD ADD tACE ADD tRC ADD CE OE tOE tOH VALID tHZ VALID tAA DATA VALID PAGE READ A3-A20 VALID ADD (A-1),A0,A1,A2 1'st ADD tAA 2'nd ADD tPA VALID VALID 3'rd ADD DATA VALID Note: CE, OE are enable. Page size is 8 double words in 32-bit mode, 16 words in 16-bit mode. P/N:PM0410 REV. 2.1, JAN. 29, 1999 5 INDEX MX23L6422 REVISION HISTORY REVISION 2.1 DESCRIPTION AC CHARACTERISTICS tOH 10ns-->0ns PAGE P4 DATE JAN/29/1999 P/N:PM0410 REV. 2.1, JAN. 29, 1999 6 INDEX MX23L6422 MACRONIX INTERNATIONAL CO., LTD. HEADQUARTERS: TEL:+886-3-578-8888 FAX:+886-3-578-8887 EUROPE OFFICE: TEL:+32-2-456-8020 FAX:+32-2-456-8021 JAPAN OFFICE: TEL:+81-44-246-9100 FAX:+81-44-246-9105 SINGAPORE OFFICE: TEL:+65-747-2309 FAX:+65-748-4090 TAIPEI OFFICE: TEL:+886-3-509-3300 FAX:+886-3-509-2200 MACRONIX AMERICA, INC. TEL:+1-408-453-8088 FAX:+1-408-453-8488 CHICAGO OFFICE: TEL:+1-847-963-1900 FAX:+1-847-963-1909 http : //www.macronix.com MACRONIX INTERNATIONAL CO., LTD. reserves the rignt to change product and specifications without notice. 7 |
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